Mohammad Sawan, Polytechnique Montréal
Shahriar Mirabbasi, University of British Columbia
Ljiljana Trajkovic, Simon Fraser University
Sudip Shekhar, University of British Columbia
Luc Hébrard, University of Strasbourg
Patricia Desgreys, Telecom ParisTech
Jean-Baptiste Begueret, University of Bordeaux
Benoit Gosselin, Universite Laval
Thierry Taris, University of Bordeaux
Carlos Saavedra, Queen’s University
Roman Genov, University of Toronto
Zhihua Wang, Tsinghua Universty
Ricardo Reis, Federal University of Rio Grande do Sul
Magdy Bayoumi, University of Louisiana
Peter Stokes, CMC Microsystems
Bob Gill, British Columbia Institute of Technology
Stephen Makonin, Simon Fraser University
T1: Tiny Inductively powered Battery Chargers
by Gabriel Rincon-Mora (Georgia Institute of Technology)
T2: Development of Massively-Parallel Multimedia Algorithms and Applications in the Integrated Multi-Core/GPU Platform
by Saeid Nooshabadi (Michigan Technological University)
T3: Phase-Locked Clock Generation for SoC: Circuit and System Design Aspects
by Woogeun Rhee (Tsinghua University)
T4: Optimizing NanoCMOS Circuits by Using Transistor Networks
by Ricardo Reis, Universidade Federal do Rio Grande do Sul (UFRGS)
Poster size should be at most A0 in portrait orientation, that is:
841mm x 1189mm or
33.1" x 46.8" (width x height).
Each regular lecture presentation is for 18 minutes including the questions and answers.